Design of a 0.9 V 2.45 GHz Self-Testable and Reliability-Enhanced CMOS LNA

Author:

Cimino MikaËl,Lapuyade HervÉ,Deval Yann,Taris Thierry,Begueret Jean-Baptiste

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 22 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Low-Cost Indirect Measurements for Power-Efficient In-Field Optimization of Configurable Analog Front-Ends with Self-X Properties: A Hardware Implementation;Chips;2023-05-01

2. Design and Analysis of 1.5 GHz LNA with Sufficient Gain and Noise Performance;2022 IEEE Microwaves, Antennas, and Propagation Conference (MAPCON);2022-12-12

3. Machine Learning Support for Diagnosis of Analog Circuits;Machine Learning Support for Fault Diagnosis of System-on-Chip;2022-10-22

4. Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs;2022 IEEE 40th VLSI Test Symposium (VTS);2022-04-25

5. Digital-to-Analog Hardware Trojan Attacks;IEEE Transactions on Circuits and Systems I: Regular Papers;2022-02

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