A 13.5-mW 5-GHz Frequency Synthesizer With Dynamic-Logic Frequency Divider

Author:

Pellerano S.,Levantino S.,Samori C.,Lacaita A.L.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 112 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. VLSI Design for Low-power and Wide-band Programmable Frequency Divider;2023 IEEE 5th Eurasia Conference on IOT, Communication and Engineering (ECICE);2023-10-27

2. Mathematical modelling and simulation of a wideband PLL for application in frequency synthesizers;e-Prime - Advances in Electrical Engineering, Electronics and Energy;2023-09

3. A Low Spur 5.9-GHz CMOS Frequency Synthesizer with Loop Sampling Filter for C-V2X Applications;Journal of Circuits, Systems and Computers;2023-03-01

4. Low-Power TSPC 2/3 Frequency Prescaler in Low-Cost 180nm CMOS;2022 Cross Strait Radio Science & Wireless Technology Conference (CSRSWTC);2022-12-17

5. A 5.5-GHz Low-Power Divide-By-8/9 Dual Modulus Prescaler Using Pulse Extension Logic;Journal of Circuits, Systems and Computers;2022-10-13

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