Distributed Loss-Compensation Techniques for Energy-Efficient Low-Latency On-Chip Communication
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx5/4/4214957/04214970.pdf?arnumber=4214970
Cited by 24 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A full‐duplex transceiver for 20‐Gbps high‐speed simultaneous bidirectional signaling across global on‐chip interconnections;International Journal of Circuit Theory and Applications;2021-08-26
2. Hybrid bidirectional transceiver for multipoint‐to‐multipoint signalling across on‐chip global interconnects;IET Circuits, Devices & Systems;2020-09
3. A 16 Gbps, Full-Duplex Transceiver over Lossy On-Chip Interconnects in 28 nm CMOS Technology;Electronics;2020-04-26
4. Optoelectronic neuron on c-negatron;Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2018;2018-10-01
5. Current-Mode Triline Transceiver for Coded Differential Signaling Across On-Chip Global Interconnects;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-09
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