Low-Power Logic Circuit and SRAM Cell Applications With Silicon on Depletion Layer CMOS (SODEL CMOS) Technology-Reference-Cited by-同舟云学术

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Low-Power Logic Circuit and SRAM Cell Applications With Silicon on Depletion Layer CMOS (SODEL CMOS) Technology

Published:2006-06 Issue:6 Volume:41 Page:1455-1462
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:en
Short-container-title:IEEE J. Solid-State Circuits

Author:

Inaba S.,Nagano H.,Miyano K.,Mizushima I.,Okayama Y.,Nakauchi T.,Ishimaru K.,Ishiuchi H.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/34322/01637609.pdf?arnumber=1637609

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design of High Performance FinFET SRAM Cell for Write Operation;Emerging Trends in Computing and Expert Technology;2019-11-07

2. Novel Eight-Transistor SRAM cell for write power reduction;IEICE Electronics Express;2010

3. A proposed SRAM cell for low power consumption during write operation;Microelectronics International;2009-01-23

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