A 107.4 dB SNR Multi-Bit Sigma Delta ADC With 1-PPM THD at $-$0.12 dB From Full Scale Input-Reference-Cited by-同舟云学术

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A 107.4 dB SNR Multi-Bit Sigma Delta ADC With 1-PPM THD at $-$0.12 dB From Full Scale Input

Published:2009-11 Issue:11 Volume:44 Page:3060-3066
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Wu Jian-Yi,Zhang Zhenyong,Subramoniam Rajaram,Maloberti Franco

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/5308580/05308732.pdf?arnumber=5308732

Cited by 15 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 93.4-dB SNDR single-ended SAR ADC with a hybrid R–C DAC;Microelectronics Journal;2024-01

2. A 111dB-SNDR 20kHz-BW Delta-Sigma Modulator with Auto-Zeroing and Class-AB Amplifier;Journal of Physics: Conference Series;2023-10-01

3. An 18-bit 2-2 MASH delta-sigma modulator for isolated amplifier;Microelectronics Journal;2023-06

4. Digital Assisted Truncation Noise Shaping Technique for Multi-bit $$\Sigma \Delta $$ Modulators;Arabian Journal for Science and Engineering;2020-11-03

5. A Low Power Sigma-Delta Modulator with Hybrid Architecture;Sensors;2020-09-16

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