A 500-mb/s soft-output viterbi decoder-Reference-Cited by-同舟云学术

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A 500-mb/s soft-output viterbi decoder

Published:2003-07 Issue:7 Volume:38 Page:1234-1241
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:en
Short-container-title:IEEE J. Solid-State Circuits

Author:

Engling Yeo ,Augsburger S.A.,Davis W.R.,Nikolic B.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/27195/01208474.pdf?arnumber=1208474

Cited by 26 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. A High-throughput Parallel Viterbi Algorithm via Bitslicing;ACM Transactions on Parallel Computing;2021-12-31

3. Low-Routing-Complexity Convolutional/Turbo Decoder Design for Iterative Detection and Decoding Receivers;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-11

4. An FPGA Scalable Parallel Viterbi Decoder;2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2018-09

5. Design of a High-Throughput Sliding Block Viterbi Decoder for IEEE 802.11ac WLAN Systems;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2017

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