Affiliation:
1. Institute of Microelectronics of Chinese Academy of Sciences
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing
Reference13 articles.
1. [1] IEEE Std 802.11ac-2013, “Wireless LAN medium access control (MAC) and physical layer (PHY) specifications: Enhancements for very high throughput for operation in bands below 6GHz,” Dec. 2013. 10.1109/ieeestd.2013.6687187
2. [2] I. Habib, O. Paker, and S. Sawitzki, “Design space exploration of hard-decision Viterbi decoding: Algorithm and VLSI implementation,” IEEE Trans. VLSI Syst., vol.18, no.5, pp.794-807, May 2010. 10.1109/tvlsi.2009.2017024
3. [3] G. Fettweis and H. Meyr, “Feedforward architectures for parallel Viterbi decoding,” J. VLSI Signal Process., vol.3, no.1, pp.105-119, Jan. 1991. 10.1007/978-1-4615-4036-6_8
4. [4] P.J. Black and T.H. Meng, “A 1-Gb/s, four-state, sliding block viterbi decoder,” IEEE J. Solid-State Circuits, vol.32, no.6, pp.797-805, June 1997. 10.1109/4.585246
5. [5] G. Fettweis and H. Meyr, “High-rate Viterbi processor: A systolic array solution,” IEEE J. Sel. Areas Commun., vol.8, no.8, pp.1520-1534, Aug. 1990. 10.1109/49.62830