Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data-Reference-Cited by-同舟云学术

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Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data

Published:2008-09 Issue:9 Volume:43 Page:2120-2133
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Lee Jri,Chen Ming-Shuan,Wang Huai-De

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/4625985/04626011.pdf?arnumber=4626011

Cited by 96 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 0.45 pJ/b 24 Gb/s NRZ Receiver Data-Path Using Half-Baud-Rate Duobinary Sampling;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-09

2. A High-Speed 130-nm SiGe BiCMOS Integrated Duobinary Driver for Data Rate Capacity Enhancement in VCSEL-Based Optical Links;IEEE Access;2024

3. A High-Speed 390 GHz BPOOK Transmitter;Analog Circuits and Signal Processing;2024

4. A High Speed and Low BER Dual-mode Adaptive Equalizer Using Hybrid Parallel DFE;IEICE Electronics Express;2024

5. A Low-Power 40Gb/s PAM4 Transmitter with High Speed-Latch and 3-Tap FFE;2023 5th International Conference on Circuits and Systems (ICCS);2023-10-27

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