Design of Acceptable Stray Inductance Based on Scaling Method for Power Electronics Circuits
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Energy Engineering and Power Technology
Link
http://xplorestaging.ieee.org/ielx7/6245517/7837735/07779003.pdf?arnumber=7779003
Cited by 25 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Substrate Embedded Power Electronics Packaging for Silicon Carbide mosfets;IEEE Transactions on Power Electronics;2024-08
2. Topology-aware Iterative Method for Large-scale Power Electronic Systems with Stray Parameters;2023 IEEE 14th International Symposium on Power Electronics for Distributed Generation Systems (PEDG);2023-06-09
3. Prediction Procedure of Parasitic Parameters Considering Laminated Bus Bar Geometries Based on Machine Learning;2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia);2023-05-22
4. A Prediction for Allowable Maximum Turn-on Speed of SiC Power Module by A Correlation Between Turn-on Transient Waveforms;2022 19th China International Forum on Solid State Lighting & 2022 8th International Forum on Wide Bandgap Semiconductors (SSLCHINA: IFWS);2023-02-07
5. Prediction Procedure of Parasitic Parameters Considering Laminated Bus Bar Geometries Based on Online Machine Learning;IEEE Open Journal of Power Electronics;2023
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