A 617 TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOS-Reference-Cited by-同舟云学术

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A 617 TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOS

Published:2020-06 Issue: Volume: Page:
ISSN:
Container-title:2020 IEEE Symposium on VLSI Circuits
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Author:

Knag Phil C.,Chen Gregory K.,Sumbul H. Ekin,Kumar Raghavan,Anders Mark A.,Kaul Himanshu,Hsu Steven K.,Agarwal Amit,Kar Monodeep,Kim Seongjong,Krishnamurthy Ram K.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9146894/9162771/09162949.pdf?arnumber=9162949

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An ASIC Accelerator for QNN With Variable Precision and Tunable Energy Efficiency;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-07

2. Binaryware: A High-Performance Digital Hardware Accelerator for Binary Neural Networks;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

3. A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W;ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC);2023-09-11

4. REDRESS: Generating Compressed Models for Edge Inference Using Tsetlin Machines;IEEE Transactions on Pattern Analysis and Machine Intelligence;2023-09-01

5. A 1.23μJ/Inference, All-Digital Shuffle-Type Group-CNN Accelerator in 28nm CMOS With 85.8% Accuracy on CIFAR-10;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-01

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