A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding-Reference-Cited by-同舟云学术

A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding

Published:2022-03 Issue:3 Volume:57 Page:845-857
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Yoon Jong-Hyeok¹^ORCID,Chang Muya¹^ORCID,Khwa Win-San²,Chih Yu-Der³,Chang Meng-Fan²^ORCID,Raychowdhury Arijit¹^ORCID

Affiliation:

1. School of Electrical and Computing Engineering, Georgia Institute of Technology, Atlanta, GA, USA

2. TSMC Corporate Research, Hsinchu, Taiwan

3. TSMC Design Technology, Hsinchu, Taiwan

Funder

Semiconductor Research Corporation through the Center for Brain-Inspired Computing

Applications and Systems-Driven Center for Energy-Efficient Integrated Nano Technologies

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/9718232/09689060.pdf?arnumber=9689060

Reference36 articles.

1. A 40 nm 100 Kb 118.44 TOPS/W ternary-weight computein-memory RRAM macro with voltage-sensing read and write verification for reliable multi-bit RRAM operation;yoon;Proc IEEE Custom Integr Circuits Conf (CICC),2021

2. 2-Bit-Per-Cell RRAM-Based In-Memory Computing for Area-/Energy-Efficient Deep Learning

3. Characterization and Mitigation of Relaxation Effects on Multi-level RRAM based In-Memory Computing

4. Ratio-based multi-level resistive memory cells;lastras-montaño;Sci Rep,2021

5. Impact of RTN on Pattern Recognition Accuracy of RRAM-Based Synaptic Neural Network

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