Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital

Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital–Analog Networks

Published:2023-10 Issue:10 Volume:58 Page:2931-2945
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Kim Sangyeob¹^ORCID,Kim Sangjin¹^ORCID,Um Soyeon¹^ORCID,Kim Soyeon¹^ORCID,Kim Kwantae²^ORCID,Yoo Hoi-Jun¹^ORCID

Affiliation:

1. School of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, South Korea

2. Institute of Neuroinformatics, University of Zürich and ETH Zürich, Zürich, Switzerland

Funder

Samsung Electronics Company Ltd., Seoul, South Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/10262388/10130013.pdf?arnumber=10130013

Reference21 articles.

1. A 65-nm Neuromorphic Image Classification Processor With Energy-Efficient Training Through Direct Spike-Only Feedback

2. DIET-SNN: Direct input encoding with leakage and threshold optimization in deep spiking neural networks;rathi;arXiv 2008 03658,2020

3. A 4096-neuron 1M-synapse 3.8 PJ/SOP spiking neural network with on-chip STDP learning and sparse weights in 10 nm FinFET CMOS;chen;Proc IEEE Symp VLSI Circuits,2018

4. An Energy-Efficient Computing-in-Memory Neuromorphic System with On-Chip Training

5. A 28 nm SoC with a 1.2 GHz 568 nJ/prediction sparse deep-neural-network engine with0.1 timing error rate tolerance for IoT applications;whatmough;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2017

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1. Tempo-CIM: A RRAM Compute-in-Memory Neuromorphic Accelerator With Area-Efficient LIF Neuron and Split-Train-Merged-Inference Algorithm for Edge AI Applications;IEEE Journal on Emerging and Selected Topics in Circuits and Systems;2023-12