A Time-Domain Wavefront Computing Accelerator With a 32 × 32 Reconfigurable PE Array-Reference-Cited by-同舟云学术

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A Time-Domain Wavefront Computing Accelerator With a 32 × 32 Reconfigurable PE Array

Published:2023-08 Issue:8 Volume:58 Page:2372-2382
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Yu Chengshuo¹^ORCID,Mu Junjie¹^ORCID,Su Yuqi¹^ORCID,Tshun Chuan Chai Kevin²^ORCID,Kim Tony Tae-Hyoung¹^ORCID,Kim Bongjin³^ORCID

Affiliation:

1. School of Electrical and Electronic Engineering, Nanyang Technological University, Jurong West, Singapore

2. Institute of Microelectronics, Agency for Science, Technology and Research (A*STAR), Fusionopolis, Singapore

3. Department of Electrical and Computer Engineering, University of California at Santa Barbara, Santa Barbara, CA, USA

Funder

A*STAR RIE2020 Advanced Manufacturing and Engineering (AME) Programmatic Fund

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/10192489/10021314.pdf?arnumber=10021314

Reference35 articles.

1. Massively Parallel A* Search on a GPU

2. An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning

3. An efficient improved artificial potential field based regression search method for robot path planning

4. All-Digital Time-Domain Compute-in-Memory Engine for Binary Neural Networks With 1.05 POPS/W Energy Efficiency

5. A 1200×1200 8-Edges/Vertex FPGA-Based Motion-Planning Accelerator for Dual-Arm-Robot Manipulation Systems

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Time-domain Subtractive Readout Scheme for Scalable Capacitive Analog In-Memory Computing;2023 IEEE 36th International System-on-Chip Conference (SOCC);2023-09-05

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