A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit-Reference-Cited by-同舟云学术

A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit

Published:2022 Issue: Volume: Page:1-20
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Gao Zhong¹^ORCID,He Jingchu¹,Fritz Martin²,Gong Jiang³^ORCID,Shen Yiyu¹^ORCID,Zong Zhirui¹,Chen Peng⁴^ORCID,Spalink Gerd²,Eitel Ben²,Alavi Morteza S.¹^ORCID,Staszewski Robert Bogdan¹^ORCID,Babaie Masoud¹^ORCID

Affiliation:

1. Department of Microelectronics, Delft University of Technology, Delft, The Netherlands

2. Stuttgart Technology Center, Sony Europe B.V., Stuttgart, Germany

3. Department of Quantum and Computer Engineering, Delft University of Technology, Delft, The Netherlands

4. School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland

Funder

Sony Semiconductor Solutions

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/4359912/09917492.pdf?arnumber=9917492

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