A 158-mW 360-MHz BW 68-dB DR Continuous-Time 1-1-1 Filtering MASH ADC in 40-nm CMOS

Author:

Liu Qilong1ORCID,Breems Lucien J.2ORCID,Bajoria Shagun1ORCID,Bolatkale Muhammed2ORCID,Rutten Robert2,Radulov Georgi1

Affiliation:

1. Integrated Circuits Group, Eindhoven University of Technology, Eindhoven, The Netherlands

2. NXP Semiconductors, Eindhoven, The Netherlands

Funder

Dutch Technology Foundation

NXP Semiconductors, Eindhoven

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Reference31 articles.

1. Minimizing Signal-Dependent Residue in CT Pipelined ADCs

2. An 800 MHz-BW VCO-based continuous-time pipelined ADC with inherent anti-aliasing and on-chip digital reconstruction filter;shibata;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2020

3. A case study on a 2-1-1 cascaded continuous-time sigma-delta Modulator

4. Analysis of the Inter-Stage Signal Leakage in Wide BW Low OSR and High DR CT MASH ΔΣM

5. Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28 nm CMOS;dong;Proc IEEE Custom Integr Circuits Conf (CICC),2017

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. High-Speed and High-Performance Continuous-Time ADCs for Automotive Receivers;IEEE Open Journal of the Solid-State Circuits Society;2023

2. Continuous-Time Pipelined ADC: A Breed of Continuous-Time ADCs for Wideband Data Conversion;IEEE Open Journal of the Solid-State Circuits Society;2023

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