Continuous-Time Pipelined ADC: A Breed of Continuous-Time ADCs for Wideband Data Conversion
Author:
Affiliation:
1. Toronto Design Center, Analog Devices Canada, Toronto, Canada
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/8782712/10019316/10246305.pdf?arnumber=10246305
Reference30 articles.
1. Continuous-Time Input Pipeline ADCs
2. Continuous-Time Pipelined Analog-to-Digital Converters: A Mini-Tutorial
3. Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs
4. A 9-GS/s 1.125-GHz BW Oversampling Continuous-Time Pipeline ADC Achieving −164-dBFS/Hz NSD
5. 3.3 A 5GS/s 158.6mW 12b Passive-Sampling 8×-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOS
Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Fundamentals of Continuous-Time ADCs: Part One: The Continuous-Time Pipeline;IEEE Solid-State Circuits Magazine;2024
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