Design and Analysis of 55–63-GHz Fundamental Quad-Core VCO With NMOS-Only Stacked Oscillator in 28-nm CMOS-Reference-Cited by-同舟云学术

Design and Analysis of 55–63-GHz Fundamental Quad-Core VCO With NMOS-Only Stacked Oscillator in 28-nm CMOS

Published:2022-07 Issue:7 Volume:57 Page:1997-2010
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Balamurali Sriram¹^ORCID,Mangraviti Giovanni¹^ORCID,Tsai Cheng-Hsueh²^ORCID,Wambacq Piet¹^ORCID,Craninckx Jan¹^ORCID

Affiliation:

1. imec, Leuven, Belgium

2. Department of Electronics and Informatics, Vrije Universiteit Brussel, Brussels, Belgium

Funder

Strategic Research Program of the Vrije Universiteit Brussels

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/9809766/09762460.pdf?arnumber=9762460

Reference25 articles.

1. A 10.7–14.1 GHz Reconfigurable Octacore DCO with −126 dBc/Hz Phase Noise at 1 MHz offset in 28 nm CMOS

2. Analysis and Design of a 54 GHz Distributed “Hybrid” Wave Oscillator Array With Quadrature Outputs

3. A 60 GHz 186.5 dBc/Hz FoM quad-core fundamental VCO using circular triple-coupled transformer with no mode ambiguity in 65 nm CMOS;jia;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2021

4. On the Phase Noise Performance of Transformer-Based CMOS Differential-Pair Harmonic Oscillators

5. Implicit Common-Mode Resonance in LC Oscillators

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