Non-blocking collector InP/GaAs/sub 0.51/Sb/sub 0.49//InP double heterojunction bipolar transistors with a staggered lineup base-collector junction-Reference-Cited by-同舟云学术

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Non-blocking collector InP/GaAs/sub 0.51/Sb/sub 0.49//InP double heterojunction bipolar transistors with a staggered lineup base-collector junction

Published:1999-04 Issue:4 Volume:20 Page:155-157
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Bolognesi C.R.,Matine N.,Dvorak R.W.,Xu X.G.,Hu J.,Watkins S.P.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx4/55/16280/00753751.pdf?arnumber=753751

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2. A Multiscale TCAD Approach for the Simulation of InP DHBTs and the Extraction of Their Transit Times;IEEE Transactions on Electron Devices;2019-12

3. Advances in InP/Ga(In)AsSb double heterojunction bipolar transistors (DHBTs);Japanese Journal of Applied Physics;2019-03-20

4. P-type conductivity control of Si-doped GaAsSb layers grown by metalorganic chemical vapor deposition;Japanese Journal of Applied Physics;2014-12-22

5. Current Gain and Offset Voltage in an InGaP/GaAsSb/GaAs Double Heterojunction Bipolar Transistor;IEEE Transactions on Electron Devices;2012-12

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