A fully integrated 40-Gb/s clock and data recovery IC with 1:4 DEMUX in SiGe technology

Author:

Reinhold M.,Dorschky C.,Rose E.,Pullela R.,Mayer P.,Kunz F.,Baeyens Y.,Link T.,Mattia J.-P.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 41 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Basic Transimpedance Amplifier Design;Analysis and Design of Transimpedance Amplifiers for Optical Receivers;2017-09-22

2. A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission;IEEE Journal of Solid-State Circuits;2012-12

3. A fully integrated 40-GB/S CDR with eight-phase VCO for optical fiber communication;Microwave and Optical Technology Letters;2012-11-20

4. Introduction;CMOS Receiver Front-ends for Gigabit Short-Range Optical Communications;2012-08-08

5. 12.5 Gbps 1:16 DEMUXIC with high speed synchronizing circuits;Journal of Semiconductors;2011-12

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