Logic synthesis speeds ASIC design-Reference-Cited by-同舟云学术

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Logic synthesis speeds ASIC design

Published:1989-08 Issue:8 Volume:26 Page:27-31
ISSN:0018-9235
Container-title:IEEE Spectrum
language:
Short-container-title:IEEE Spectr.

Author:

de Geus A.J.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx3/6/1323/00030776.pdf?arnumber=30776

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Automated Synthesis Framework for Fast Evaluation of Maximum Operating Frequency;2023 International Conference on Electronics, Information, and Communication (ICEIC);2023-02-05

2. Evaluation of FinFET in Ultra Low Power ALU;2022 IEEE International Conference on Design & Test of Integrated Micro & Nano-Systems (DTS);2022-06-06

3. Advanced digital receiver principles and technologies for PCS;IEEE Communications Magazine;1995

4. Constrained resource sharing and conflict resolution in Hebe;Integration;1991-12

5. From a high level description of an IC to silicium: Don't loose design intent;Microprocessing and Microprogramming;1991-08

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