Performance Optimization of Atomic Layer Deposited HfO<sub>x</sub> Memristor by Annealing With Back-End-of-Line Compatibility-Reference-Cited by-同舟云学术

Performance Optimization of Atomic Layer Deposited HfO_x Memristor by Annealing With Back-End-of-Line Compatibility

Published:2022-07 Issue:7 Volume:43 Page:1141-1144
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Chen Hong¹^ORCID,Li Lianzheng²,Wang Jinbin¹,Zhao Guangchao³^ORCID,Li Yida⁴^ORCID,Lan Jun⁴^ORCID,Tay Beng Kang³^ORCID,Zhong Gaokuo²^ORCID,Li Jiangyu⁴,Huang Mingqiang²^ORCID

Affiliation:

1. School of Materials Science and Engineering, Xiangtan University, Xiangtan, China

2. Shenzhen Institute of Advanced Technology, Chinese Academy of Sciences, Shenzhen, China

3. CNRS-International NTU-THALES-Research-Alliance (CINTRA), Nanyang Technological University, Singapore

4. Guangdong Provincial Key Laboratory of Functional Oxide Materials and Devices, Southern University of Science and Technology, Shenzhen, China

Funder

Shenzhen Science and Technology Innovation Committee

National Natural Science Foundation of China

Guangdong Provincial Key Laboratory Program from the Department of Science and Technology of Guangdong Province

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/55/9811240/09781407.pdf?arnumber=9781407

Reference21 articles.

1. Improving Analog Switching in HfOx-Based Resistive Memory With a Thermal Enhanced Layer

2. Effects of post-metal annealing on the electrical characteristics of HfOx-based resistive switching memory devices

3. Self-Compliance and High Performance Pt/HfOx/Ti RRAM Achieved through Annealing

4. Volatile and Nonvolatile Memory Operations Implemented in a Pt/HfO₂/Ti Memristor

5. Hardware‐Friendly Stochastic and Adaptive Learning in Memristor Convolutional Neural Networks

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