Investigation of Random Telegraph Noise Under Different Programmed Cell Vt Levels in Charge Trap Based 3D NAND Flash

Author:

Jia Xinlei1ORCID,Jin Lei1,Zhou Wen1ORCID,Lu Jianwei2,Amoroso Salvatore M.3ORCID,Brown Andrew R.3,Lee Ko-Hsin3ORCID,Asenov Plamen3,Lin Xi-Wei3ORCID,Liu Hongtao2ORCID,Zhang An2,Huo Zongliang1ORCID

Affiliation:

1. Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China

2. Yangtze Memory Technologies Company Ltd, Wuhan, China

3. Synopsys, Inc, Mountain View, CA, USA

Funder

National Key Research and Development Program of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Modeling and Simulation for DRAM and Flash Memory Technology Exploration and Development;2024 IEEE International Memory Workshop (IMW);2024-05-12

2. Unique Consecutive RTN Characteristics Coupled With Ferroelectric Nanodomain Switching in Advanced Fe-FinFETs;IEEE Electron Device Letters;2024-04

3. Discrete-Trap Effects on 3-D NAND Variability – Part II: Random Telegraph Noise;IEEE Journal of the Electron Devices Society;2024

4. Discrete-Trap Effects on 3-D NAND Variability – Part I: Threshold Voltage;IEEE Journal of the Electron Devices Society;2024

5. Understanding the impact of polysilicon percolative conduction on 3D NAND variability;2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD);2023-09-27

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