Author:
Juarez-Hernandez E.,Diaz-Sanchez A.
Cited by
7 articles.
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1. A Low Mismatch Current Steering Charge Pump for High-Speed PLL;Proceedings of Second International Conference on Computational Electronics for Wireless Communications;2023
2. Performance Analysis of Various Charge Pump Topologies for PLL Application;VLSI, Communication and Signal Processing;2023
3. Introduction of Frequency Synthesizer;Analog Circuits and Signal Processing;2021-12-08
4. Spur-Reduction Frequency Synthesizer Exploiting Randomly Selected PFD;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2013-03
5. Design of a programmable CMOS Charge-Pump for phase-locked loop synthesizers;Procedia Technology;2012