A 50 GHz direct injection locked oscillator topology as low power frequency divider in 0.13 μm CMOS-Reference-Cited by-同舟云学术

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A 50 GHz direct injection locked oscillator topology as low power frequency divider in 0.13 μm CMOS

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Container-title:ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705)
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Author:

Tiebout M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/8892/28114/01257075.pdf?arnumber=1257075

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Over-voltage stressed dual-resonance injection-locked frequency divider with series-peaking injection device;Analog Integrated Circuits and Signal Processing;2014-10-02

2. SiGe Clock and Data Recovery System Based on Injection-Locked Oscillator for 100 Gbit/s Serial Data Link;IEEE Journal of Solid-State Circuits;2014-09

3. Theory of Injection-Locked Oscillator Phase Noise;IEEE Transactions on Circuits and Systems I: Regular Papers;2011-02

4. Design of 24-GHz 0.8-V 1.51-mW Coupling Current-Mode Injection-Locked Frequency Divider With Wide Locking Range;IEEE Transactions on Microwave Theory and Techniques;2009-08

5. A 66–72 GHz divide-by-3 injection-locked frequency divider in 0.13-μm CMOS technology;2007 IEEE Asian Solid-State Circuits Conference;2007-11

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