A 28-GHz fractional-N frequency synthesizer with reference and frequency doublers for 5G cellular

Author:

Siriburanon Teerachot,Liu Hanli,Nakata Kengo,Deng Wei,Son Ju Ho,Lee Dae Young,Okada Kenichi,Matsuzawa Akira

Publisher

IEEE

Cited by 24 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 0.065 mm² Inductive Coupling Based Dual Core mm-Wave VCO With 183 dBc/Hz FoMT;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-06

2. A Duty-Cycle-Error-Immune Reference Frequency Doubling Technique for Fractional-$N$ Digital PLLs;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

3. Design and Analysis of Sub-Sampling Phase-Locked Loop for Quantum Computing;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-09

4. A low jitter fractional PLL with offset current charge pump;Microelectronics Journal;2023-08

5. A Fractional-N Synthesizer Based on Programmable Frequency Multiplier for 5G+ Communication System;IEEE Transactions on Microwave Theory and Techniques;2023-04

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