A detailed and flexible cycle-accurate Network-on-Chip simulator-Reference-Cited by-同舟云学术

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A detailed and flexible cycle-accurate Network-on-Chip simulator

Published:2013-04 Issue: Volume: Page:
ISSN:
Container-title:2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
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Author:

Jiang Nan,Balfour James,Becker Daniel U.,Towles Brian,Dally William J.,Michelogiannakis George,Kim John

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6523368/6557136/06557149.pdf?arnumber=6557149

Cited by 224 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Tulip: Turn-Free Low-Power Network-on-Chip;IEEE Computer Architecture Letters;2024-01

2. ARCHER: a ReRAM-based accelerator for compressed recommendation systems;Frontiers of Computer Science;2023-12-23

3. Mapping of Deep Neural Network Accelerators on Wireless Multistage Interconnection NoCs;Applied Sciences;2023-12-20

4. A Spatial-Designed Computing-In-Memory Architecture Based on Monolithic 3D Integration for High-Performance Systems;Proceedings of the 18th ACM International Symposium on Nanoscale Architectures;2023-12-18

5. Modelling and Impact Analysis of Push Back Attack in 3D Bufferless Network on Chip;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18

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