Passiveless Digitally Controlled Oscillator With Embedded PVT Detector Using 40-nm CMOS
Author:
Affiliation:
1. National Sun Yat-Sen University,Dept. of Electrical Engineering,Kaohsiung,Taiwan,80424
2. National Sun Yat-Sen University,Inst. of Undersea Technology (IUT),Taiwan
Funder
National Science and Technology Council
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10395907/10395930/10396334.pdf?arnumber=10396334
Reference10 articles.
1. A 3.9-4.7 GHz 0.35 mW DCO with −187.4 dBc FoM in 28nm CMOS
2. Tutorial: Design of High-Speed Nano-Scale CMOS Mixed-Voltage Digital I/O Buffer With High Reliability to PVTL Variations
3. An Ultra-low Power Thermo-Electric Harvester in 45nm CMOS Process
4. A highly linear current-starved VCO based on a linearized current control mechanism
5. 2$$\times $$VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process
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