A Sign-Equality-Based Background Timing-Mismatch Calibration Algorithm for Time-Interleaved ADCs-Reference-Cited by-同舟云学术

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A Sign-Equality-Based Background Timing-Mismatch Calibration Algorithm for Time-Interleaved ADCs

Published:2016-06 Issue:6 Volume:63 Page:518-522
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Kang Hyun-Wook,Hong Hyeok-Ki,Park Sanghoon,Kim Ki-Jin,Ahn Kwang-Ho,Ryu Seung-Tak

Funder

Ministry of Trade, Industry, and Energy of the Republic of Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/7478681/07410049.pdf?arnumber=7410049

Cited by 31 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Calibration on timing skew mismatch of time‐interleaved ADC based on optimized adaptive genetic algorithm back‐propagation neural network;International Journal of Circuit Theory and Applications;2024-08-18

2. A Wideband Timing Mismatch Calibration Design for Time-Interleaved Analog-to-Digital Converters with Fast Convergence;Electronics;2024-06-24

3. A comprehensive review of time skew background calibration and mitigation techniques in high‐speed time‐interleaved analog‐to‐digital converters;International Journal of Circuit Theory and Applications;2024-06-12

4. An improved wide-range, low-complexity, fully-parallel digital background timing mismatch calibration method for dual-channel TIADC based on perfect reconstruction filter bank;AEU - International Journal of Electronics and Communications;2023-11

5. An 18‐bit 1‐GS/s time interleaved analog‐to‐digital converter with timing skew calibration based on an adaptive genetic algorithm;International Journal of Circuit Theory and Applications;2023-06-11

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