Author:
Cheng Shanfeng,Tong Haitao,Silva-Martinez Jose,Karslayan Aydin lker
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Signal Processing
Cited by
9 articles.
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1. Analysis and Verification of Jitter in Bang-Bang Clock and Data Recovery Circuit With a Second-Order Loop Filter;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2019-10
2. Transient Analysis of Bang–Bang Phase-Locked Loops for Frequency Step Inputs;Arabian Journal for Science and Engineering;2013-12-22
3. A novel approach to analysis and design of bang-bang CDR circuits;COMPEL - The international journal for computation and mathematics in electrical and electronic engineering;2013-11-11
4. Modeling of jitter in bang‐bang clock and data recovery circuits;COMPEL - The international journal for computation and mathematics in electrical and electronic engineering;2013-05-03
5. Nonlinear Analysis of BBCDR Jitter Generation Using VOLTERRA Series;IEEE Transactions on Circuits and Systems II: Express Briefs;2013-04