Author:
Gao Junfeng,Li Guangjun,Huang Letian,Li Qiang
Funder
National Natural Science Foundation of China
Chinese National Program for Support of Top-Notch Young Professionals (1st Batch)
National Key Laboratory of Analog Integrated Circuits
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
13 articles.
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1. An energy-efficient reconfigurable 18/12-bit 1 MS/s pipelined-SAR ADC;AEU - International Journal of Electronics and Communications;2024-05
2. Behavioral Model for High-Speed SAR ADCs With On-Chip References;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12
3. Comparative Study of High Speed ADCs;Highlights in Science, Engineering and Technology;2022-12-27
4. A 9-Bit 70-MS/s Two-Stage SAR ADC With Passive Residue Transfer;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2020-05
5. A 12.1 fJ/Conv.-Step 12b 140 MS/s 28-nm CMOS Pipelined SAR ADC Based on Energy-Efficient Switching and Shared Ring Amplifier;IEEE Transactions on Circuits and Systems II: Express Briefs;2019-07