Rethinking Parallel Memory Access Pattern in Number Theoretic Transform Design
Author:
Affiliation:
1. School of Electronic Science and Engineering, Nanjing University, Nanjing, China
Funder
National Key Research and Development Program of China
National Natural Science Foundation of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/10124122/10079124.pdf?arnumber=10079124
Reference16 articles.
1. ReMCA: A Reconfigurable Multi-Core Architecture for Full RNS Variant of BFV Homomorphic Evaluation
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3. HEAX
4. A Highly Unified Reconfigurable Multicore Architecture to Speed Up NTT/INTT for Homomorphic Polynomial Multiplication
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