A Highly Unified Reconfigurable Multicore Architecture to Speed Up NTT/INTT for Homomorphic Polynomial Multiplication
Author:
Affiliation:
1. School of Operational Support, Rocket Force University of Engineering, Xi’an, China
2. School of Microelectronics, Xi’an Jiaotong University, Xi’an, China
Funder
National Natural Science Foundation (NNSF) of China
Aeronautical Science Foundation of China
Key-Area Research and Development Program of Guangdong Province
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/9836323/09761841.pdf?arnumber=9761841
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4. SHP-FsNTT: A Scalable and High-Performance NTT Accelerator Based on the Four-step Algorithm;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
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