A 6-GHz Bandwidth Input Buffer Based on AC-Coupled Flipped Source Follower for 12-bit 8-GS/s ADC in 28-nm CMOS
Author:
Affiliation:
1. School of Microelectronics, Xi’an Jiaotong University, Xi’an, China
2. Converter Frontier Technology R&D Center, Chengdu Sino Microelectronics Technology Company Ltd., Chengdu, China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/9900496/09815329.pdf?arnumber=9815329
Reference12 articles.
1. A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration
2. Low distortion input buffer for high resolution GS/s rate track-and-hold amplifiers
3. A Biquadratic Cell Based on the Flipped-Source-Follower Circuit
4. A 12-b 1-GS/s 31.5-mW Time-Interleaved SAR ADC With Analog HPF-Assisted Skew Calibration and Randomly Sampling Reference ADC
5. A 10-b 2b/cycle 300MS/s SAR ADC with a single differential DAC in 40nm CMOS;song;Proc IEEE Custom Integr Circuits Conf (CICC),2017
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