Analysis of a Frequency Acquisition Technique With a Stochastic Reference Clock Generator
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx5/8920/6216485/06196198.pdf?arnumber=6196198
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1. Pseudo-Reference Counter-Based FLL for 6 Gb/s Reference-Less CDR in 65-nm CMOS;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-04
2. Linear Characteristic Analysis of High-Resolution Counter-Based Frequency Detector in Type-I Digital PLL;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-02
3. Phase Noise Analysis of Clock Generator by Using Phase Noise Sensitivity;IEEE Transactions on Signal and Power Integrity;2022
4. Root Cause Analysis for the Phase Noise of the Clock Generator;2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium;2021-07-26
5. On Frequency Detection Capability of Full-Rate Linear and Binary Phase Detectors;IEEE Transactions on Circuits and Systems II: Express Briefs;2017-07
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