A Continuous-Time <inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma$</tex-math></inline-formula> ADC Utilizing Time Information for Two Cycles of Excess Loop Delay Compensation-Reference-Cited by-同舟云学术

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A Continuous-Time $\Delta \Sigma$ ADC Utilizing Time Information for Two Cycles of Excess Loop Delay Compensation

Published:2015-11 Issue:11 Volume:62 Page:1063-1067
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Hu Yue,Venkatram Hariprasath,Maghari Nima,Moon Un-Ku

Funder

Center for Design of Analog–Digital Integrated Circuits

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/7313049/07163556.pdf?arnumber=7163556

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Delay Error Shaping in ΔΣ Modulators Using Time-Interleaved High Resolution Quantizers;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-07

2. Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology;IEEE Access;2021

3. Frontiers, Trends and Challenges: Towards Next-generation ΣΔ Modulators;Sigma-Delta Converters;2018-09-03

4. Passive Loop Filter Assistance for CTSDMs;IEEE Transactions on Circuits and Systems II: Express Briefs;2017-10

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