A 99.4 dB SFDR 91.9 dB DR Continuous-Time Incremental Delta-Sigma ADC with a Noise-Shaping SAR Quantizer and a Passive Input Feedforward Stabilization Path
Author:
Affiliation:
1. National Yang Ming Chiao Tung University,Hsinchu,Taiwan,300
Funder
NSTC
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10528947/10528954/10529085.pdf?arnumber=10529085
Reference6 articles.
1. A 4th-order CT I-DSM with Digital Noise Coupling and Input Pre-conversion Method for Initialization
2. A Hybrid Continuous-Time Incremental and SAR Two-Step ADC With 90.5-dB DR Over 1-MHz BW
3. A 0.029-mm2 17-fJ/Conversion-Step Third-Order CT ADC With a Sinale OTA and Second-Order Noise-Shaping SAR Quantizer;Liu;JSSC,2019
4. A 94.3-dB SFDR, 91.5-dB DR, and 200-kS/s CT Incremental Delta–Sigma Modulator With Differentially Reset FIR Feedback
5. A 93.1-dB SFDR, 90.3-dB DR, and 1-MS/s CT Incremental Sigma-Delta Modulator Incorporating a Resistive Dual-RTZ FIR DAC
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