1. A Process and Temperature Insensitive CMOS Linear TIA for 100 Gb/s/λ PAM-4 Optical Links;Lakshmikumar;JSSC,2019
2. A 7 pA/√Hz Asymmetric Differential TIA for 100Gb/s PAM-4 links with −14dBm Optical Sensitivity in 16nm CMOS;Lakshmikumar;ISSCC,2023
3. A 100-Gb/s PAM-4 Optical Receiver With 2-Tap FFE and 2-Tap Direct-Feedback DFE in 28-nm CMOS
4. A 112 Gb/s -8.2 dBm Sensitivity 4-PAM Linear TIA in 16nm CMOS with Co-Packaged Photodiodes
5. A Dual-Polarization Silicon-Photonic Coherent Receiver Front-End Supporting 528 Gb/s/Wavelenath;Ahmed;JSSC,2023