An Out-of-order Superscalar Processor With Speculative Execution And Fast, Precise Interrupts
Author:
Dwyer H.,Torng H.C.
Publisher
IEEE Comput. Soc. Press
Cited by
2 articles.
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1. Interrupts and Branch Mispredictions;The Microarchitecture of Pipelined and Superscalar Computers;1999
2. Instruction-level parallel processing: History, overview, and perspective;The Journal of Supercomputing;1993-05