A Highly Accurate and Parallel Vision MLP FPGA Accelerator based on FP7/8 SIMD Operations
Author:
Affiliation:
1. Tokyo Institute of Technology,Yokohama,Japan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10387741/10387791/10387906.pdf?arnumber=10387906
Reference20 articles.
1. Leveraging Fine-grained Structured Sparsity for CNN Inference on Systolic Array Architectures
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3. NPE: An FPGA-based Overlay Processor for Natural Language Processing
4. Hybrid 8-bit floating point (HFP8) training and inference for deep neural networks;Sun;Adv. Neural Inform. Process. Syst.,2019
5. FP8 formats for deep learning;Micikevicius,2022
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1. High Throughput Datapath Design for Vision Permutator FPGA Accelerator;2024 IEEE International Conference on Consumer Electronics (ICCE);2024-01-06
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