High Throughput Datapath Design for Vision Permutator FPGA Accelerator-Reference-Cited by-同舟云学术

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High Throughput Datapath Design for Vision Permutator FPGA Accelerator

Published:2024-01-06 Issue: Volume: Page:1-2
ISSN:
Container-title:2024 IEEE International Conference on Consumer Electronics (ICCE)
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Author:

Yasunaga Mari¹,Suzuki Junnosuke¹,Watanabe Masato¹,Kawamura Kazushi¹,Van Chu Thiem¹,Motomura Masato¹

Affiliation:

1. Tokyo Institute of Technology,Yokohama,Japan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10444098/10444131/10444339.pdf?arnumber=10444339

Reference4 articles.

1. Are we ready for a new paradigm shift? A survey on visual deep MLP

2. Vision Permutator: A Permutable MLP-Like Architecture for Visual Recognition

3. MLP-Mixer: An all-MLP architecture for vision;Tolstikhin;Adv. Neural Inform. Process. Syst.,2021

4. A Highly Accurate and Parallel Vision MLP FPGA Accelerator based on FP7/8 SIMD Operations

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