A set of analytic formulas for capacitance of VLSI interconnects of trapezium shape-Reference-Cited by-同舟云学术

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A set of analytic formulas for capacitance of VLSI interconnects of trapezium shape

Published:1994 Issue:8 Volume:41 Page:1467-1469
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Samudra G.S.,Hsio Lin Lee

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx1/16/7376/00297745.pdf?arnumber=297745

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. New Analytic Model of Coupling and Substrate Capacitance in Nanometer Technologies;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2015-07

2. ETEM: an efficient gate and interconnect timing estimator considering cross-coupling for high performance layout;2003 5th International Conference on ASIC Proceedings (IEEE Cat No 03TH8690) ICASIC-03;2003

3. Exterior templates for capacitance computations [interconnections];IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;1999

4. Inductance and capacitance analytic formulas for VLSI interconnects;Electronics Letters;1996

5. Efficient 3D modelling for extraction of interconnect capacitances in deep submicron dense layouts;Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)

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