An Efficient Breakdown Characterization for D/T-RESURF SOI LDMOS Using Important Structure Parameters Selection Technique-Reference-Cited by-同舟云学术

An Efficient Breakdown Characterization for D/T-RESURF SOI LDMOS Using Important Structure Parameters Selection Technique

Published:2024-05 Issue:5 Volume:71 Page:2869-2875
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Chen Jing¹^ORCID,Guo Bin¹,Li Huiyuan¹,Yang Kemeng¹,Zhang Jun¹,Yao Jiafei¹^ORCID,Guo Yufeng¹^ORCID

Affiliation:

1. College of Integrated Circuit Science and Engineering and the National and Local Joint Engineering Laboratory for RF Integration and Micro-Packaging Technologies, Nanjing University of Posts and Telecommunications, Nanjing, China

Funder

National Natural Science Foundation of China

Jiangsu Provincial Key Research and Development Program

Natural Science Foundation of Jiangsu Province

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/16/10508280/10479178.pdf?arnumber=10479178

Reference22 articles.

1. SOI-LDMOS Transistors With Optimized Partial n+ Buried Layer for Improved Performance in Power Amplifier Applications

2. A Novel Ultralow R ON,sp Triple RESURF LDMOS With Sandwich n-p-n Layer

3. Analytical Study on a 700 V Triple RESURF LDMOS With a Variable High-K Dielectric Trench

4. TCAD-Augmented Machine Learning With and Without Domain Expertise

5. Powernet: SOI Lateral Power Device Breakdown Prediction With Deep Neural Networks

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