Strain Evolution in SiGe Nanosheet Transistor Process Flow-Reference-Cited by-同舟云学术

Strain Evolution in SiGe Nanosheet Transistor Process Flow

Published:2024-05 Issue:5 Volume:71 Page:2907-2913
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Chou Hung-Chun¹^ORCID,Chou Tao¹^ORCID,Chueh Shee-Jier²^ORCID,Jan Sun-Rong²,Huang Bo-Wei²^ORCID,Tu Chien-Te²^ORCID,Liu Yi-Chun²^ORCID,Wang Li-Kai³,Liu C. W.⁴^ORCID

Affiliation:

1. Graduate School of Advanced Technology, National Taiwan University, Taipei, Taiwan

2. Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan

3. Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taipei, Taiwan

4. Department of Electrical Engineering, Graduate Institute of Electronics Engineering, the Graduate Institute of Photonics and Optoelectronics, and the Graduate School of Advanced Technology, National Taiwan University, Taipei, Taiwan

Funder

National Science and Technology Council, Taiwan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/16/10508280/10494831.pdf?arnumber=10494831

Reference31 articles.

1. Critical discussion on (100) and (110) orientation dependent transport: NMOS planar and FinFET;Young

2. Enablement of next generation high performance nanosheet transistors;Loubet

3. A 7 nm FinFET technology featuring EUV patterning and dual strained high mobility channels;Xie

4. 5 nm CMOS production technology platform featuring full-fledged EUV, and high mobility channel FinFETs with densest 0.021 μm2 SRAM cells for mobile SoC and high performance computing applications;Yeap

5. Channel Geometry Impact and Narrow Sheet Effect of Stacked Nanosheet