Development of Wide-JFET Trench-Etched Double-Diffused MOS (TED-MOS) for High-Voltage Applications
Author:
Affiliation:
1. Research and Development Group, Hitachi, Ltd., Kokubunji-shi, Tokyo, Japan
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/16/10482422/10466719.pdf?arnumber=10466719
Reference21 articles.
1. 3.3 kV/450 a full-SiC nHPD2 (next high power density dual) with smooth switching;Ishigaki
2. Status and prospects for SiC power MOSFETs
3. High performance SiC trench devices with ultra-low ron
4. Anomalously anisotropic channel mobility on trench sidewalls in 4H-SiC trench-gate metal-oxide-semiconductor field-effect transistors fabricated on 8° off substrates
5. N-channel field-effect mobility inversely proportional to the interface state density at the conduction band edges of SiO2/4H-SiC interfaces
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Vertical-Channel Fin-SiC (VC Fin-SiC) With Partially Highly Doped JFET for 3.3-kV Applications;IEEE Transactions on Electron Devices;2024-09
2. Development of Vertical-Channel Fin-SiC MOSFET for 3.3 kV Applications;2024 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2024-06-02
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