1. A Circular Layout for Parallel SiC Power Devices with Parasitic Inductance Model;IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society;2023-10-16
2. Investigation into Current Sharing of Parallel SiC MOSFET Modules using a Gate-Driver with Sub-Nanosecond Time-Skew Capability;2023 25th European Conference on Power Electronics and Applications (EPE'23 ECCE Europe);2023-09-04
3. A SiC MOSFET Current Balancing Technique Based on the Gate Driver with a Multi-channel Output Stage;Conference Proceedings of 2022 2nd International Joint Conference on Energy, Electrical and Power Engineering;2023