Power Analysis of Directly-connected FPGA Clusters

Author:

Iizuka Kensuke1,Takagi Haruna1,Kamei Aika1,Hironaka Kazuei1,Amano Hideharu1

Affiliation:

1. Keio University,Dept. of Information and Computer Science,Japan

Funder

JST CREST

JST SPRING

Publisher

IEEE

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Power Optimized Design Framework for FPGA Clusters;IPSJ Transactions on System and LSI Design Methodology;2024

2. Board Allocation Algorithm for the Resource Management System of FiC;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18

3. Enormous-Scale Quantum State Vector Calculation with FPGA-accelerated SATA storages;2023 International Conference on Field Programmable Technology (ICFPT);2023-12-12

4. A Multi-FPGA Implementation of FM-Index Based Genomic Pattern Search;IEICE Transactions on Information and Systems;2023-11-01

5. RT-libSGM: FPGA-Oriented Real-Time Stereo Matching System with High Scalability;IEICE Transactions on Information and Systems;2023-03-01

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