Warpage Prediction and Optimization for Embedded Silicon Fan-Out Wafer-Level Packaging Based on an Extended Theoretical Model-Reference-Cited by-同舟云学术

Warpage Prediction and Optimization for Embedded Silicon Fan-Out Wafer-Level Packaging Based on an Extended Theoretical Model

Published:2019-05 Issue:5 Volume:9 Page:845-853
ISSN:2156-3950
Container-title:IEEE Transactions on Components, Packaging and Manufacturing Technology
language:
Short-container-title:IEEE Trans. Compon., Packag. Manufact. Technol.

Author:

Chen Cheng^ORCID,Yu Daquan,Wang Teng,Xiao Zhiyi,Wan Lixi

Funder

National Science and Technology Major Projects

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Electronic, Optical and Magnetic Materials

Link

Cited by 24 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

2. Warpage Prediction and Optimization for Wafer-Level Glass Interposer Packaging;IEEE Transactions on Components, Packaging and Manufacturing Technology;2024-08

4. Polymer-Based wafer-Level Warpage Prediction and Regulation for the Advanced Packaging;2024 IEEE 19th International Conference on Nano/Micro Engineered and Molecular Systems (NEMS);2024-05-02

5. Literature Review: Global Criticality Assessment Based on Feature Surrogates at the PCBA Levels;2024 25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE);2024-04-07