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Power Noise Suppression Using Power-and-Ground Via Pairs in Multilayered Printed Circuit Boards

  • Published:2011-03 Issue:3 Volume:1 Page:374-385
  • ISSN:2156-3950
  • Container-title:IEEE Transactions on Components, Packaging and Manufacturing Technology
  • language:
  • Short-container-title:IEEE Trans. Compon., Packag. Manufact. Technol.

Author:

Zhang Mu-Shui,Mao Jun-Fa,Long Yun-Liang

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Electronic, Optical and Magnetic Materials

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Novel Deep Reinforcement Learning Methodology for EMI Mitigation in Multiscenario Pinmap Design;IEEE Transactions on Components, Packaging and Manufacturing Technology;2024-07

2. Power Noise Suppression Using Power-and-Ground via Pairs for Signal and Power Integrity;2023 International Applied Computational Electromagnetics Society Symposium (ACES-China);2023-08-15

3. A Compact EBG Structure With Etching Spiral Slots for Ultrawideband Simultaneous Switching Noise Mitigation in Mixed Signal Systems;IEEE Transactions on Components, Packaging and Manufacturing Technology;2019-08

4. Modeling of Multilayered Power/Ground Planes Based on Resonant Cavity Algorithm;IEEE Access;2018

5. Localized Planar EBG Structure of CSRR for Ultrawideband SSN Mitigation and Signal Integrity Improvement in Mixed-Signal Systems;IEEE Transactions on Components, Packaging and Manufacturing Technology;2013-12
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