Modeling and Analysis of a Power Distribution Network in TSV-Based 3-D Memory IC Including P/G TSVs, On-Chip Decoupling Capacitors, and Silicon Substrate Effects-Reference-Cited by-同舟云学术

Modeling and Analysis of a Power Distribution Network in TSV-Based 3-D Memory IC Including P/G TSVs, On-Chip Decoupling Capacitors, and Silicon Substrate Effects

Published:2012-12 Issue:12 Volume:2 Page:2057-2070
ISSN:2156-3950
Container-title:IEEE Transactions on Components, Packaging and Manufacturing Technology
language:
Short-container-title:IEEE Trans. Compon., Packag. Manufact. Technol.

Author:

Kim Kiyeong,Hwang Chulsoon,Koo Kyoungchoul,Cho Jonghyun,Kim Heegon,Kim Joungho,Lee Junho,Lee Hyung-Dong,Park Kun-Woo,Pak Jun So

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/5503870/6365886/06341804.pdf?arnumber=6341804

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