Systolic algorithms and a memory-based design approach for a unified architecture for the computation of DCT/DST/IDCT/IDST-Reference-Cited by-同舟云学术

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Systolic algorithms and a memory-based design approach for a unified architecture for the computation of DCT/DST/IDCT/IDST

Published:2005-06 Issue:6 Volume:52 Page:1125-1137
ISSN:1057-7122
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Chiper D.F.,Swamy M.N.S.,Ahmad M.O.,Stouraitis T.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/8919/31013/01440635.pdf?arnumber=1440635

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